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Programmed Introduction to MIPS Assembly Language

Course source and credit

Pretty much everything in this programmed introduction to the MIPS assembly language comes directly or indirectly from Central Connecticut State University's eponymous course webpage.

The index page for the original course site may still be quite useful.

Another course on Java from the same author may be of future use as well.

This is a course in assembly language programming of the MIPS processor. It emphasizes the topics needed for study of computer architecture: bits, bit patterns, operations on bit patterns, and how bit patterns represent instructions and data. This course is equivalent to a semester-long junior college or university course (except, perhaps, for the emphasis on bit patterns).

The emphasis of the course is on understanding how computers work. This will provide a basis for further study of computer architecture and computer software. The MIPS processor, the subject of this course, has a well designed architecture and is particularly fruitful to study. However, the goal of the course is not to turn you into a MIPS programmer, but to give you an understanding of all computer systems.

The only equipment you need for this course is a PC. The only software you need is the SPIM simulator of the MIPS32 processor and a text editor. The simulator is available by free download (see appendix A). Example programs are presented using an MS Windows operating system. However, you can use any platform that runs SPIM. (There are many.)

Assembly Language is normally taken the semester after a course in a high level programming language (such as Java or C). This course assumes that you have this background although no specific programming language is required.

Read the pages of this course actively. Think about and answer the question at the bottom of each page. (This style of tutorial is called programmed learning. It is very effective for technical material.) Most questions call for just a little thought. Some call for pencil and paper. Keep a pencil and a scrap of paper next to your keyboard. Each chapter is about 15 pages long. Spend several minutes per page. You can read each chapter in about 30 minutes. However, for maximum benefit, you should run some of the example programs, write some programs of your own, and then think about your results. This may take several hours.

Course outline​

Appendix A — Downloading and Installing SPIM.​

This on-line course uses SPIM. SPIM is a simulator for the MIPS32 processor instruction set architecture (ISA). All you need for this course is SPIM and a text editor. The latest version of SPIM, called QtSpim, is available for free.

You will need a text editor. The text editor that comes with Microsoft operating systems, Notepad, will work, but just barely. A better text editor is much more convenient. If you are already using a text editor that came with a programming environment it will work fine. Sometimes these editors are called "program editors." The editor that comes with Visual Basic will not work. A "word processor" such as Word or WordPad will not work well, either.

One good text editor is Visual Studi Code, which can be downloaed for free.

If you are familiar with downloading and installing programs, download and install SPIM and skip the rest of this appendix. If (as happens all too often) SPIM has moved to a new location, look for it with a search engine. It is used by many schools and is downloadable from several locations.

SPIM is a MIPS32 simulator originally written by James R. Larus to support a course in compiler design at the University of Wisconsin-Madison. It has been improved and expanded and now exists in several versions. The downloads page contains versions for every operating system. You can choose the one that works on your computer.

  1. Point your Web browser to Source Forge.
  2. Click "Download Spim"
  3. There are several files that can be downloaded.
  4. Download the most recent version that can be run on your computer.

Appendix B — Register Use Chart​

Register NumberMnemonic NameConventional UseRegister NumberMnemonic NameConventional Use
$0$zeroPermanently 0$24, $25$t8, $t9Temporary
$1$atAssembler Temporary$26, $27$k0, $k1Kernel
$2, $3$v0, $v1Value returned by a subroutine$28$gpGlobal Pointer
$4-$7$a0-$a3Subroutine Arguments$29$spStack Pointer
$8-$15$t0-$t7Temporary$30$fpFrame Pointer
$16-$23$s0-$s7Saved registers$31$raReturn Address

There are also 32 floating point registers $f0 – $f31.

Appendix C — MIPS Assembly Instructions​

InstructionOperandsDescription
addd,s,t
d <-- s+t ; with overflow trap
addud,s,t
d <-- s+t ; without overflow trap
addid,s,const
d <-- s+const ; with overflow trap const is 16-bit two's comp
addiud,s,const
d <-- s+const ; without overflow trap
	const is 16-bit two's comp
andd,s,t
d <-- bitwise AND of s with t
andid,s,const
d <-- bitwise AND of s with const
beqs,t,addr
branch if s == t
A branch delay slot follows the instruction.
bgezs,addr
Branch if the two's comp. integer
in register s is >= 0
A branch delay slot follows the instruction.
bltzs,addr
Branch if the two's comp. integer
in register s is < 0
A branch delay slot follows the instruction.
bnes,t,addr
branch if s != t
A branch delay slot follows the instruction.
divs,t
lo <-- s div t ; hi <-- s mod t
	two's comp. operands
divus,t
lo <-- s div t ; hi <-- s mod t
	unsigned operands
jtarget
after a delay of one machine cycle,
PC  <-- address of target
lbd,off(b)
d <-- Sign-extended byte from
	memory address b+off
off is 16-bit two's complement
lbud,off(b)
d <-- Zero-extended byte
	from memory address b+off
	off is 16-bit two's complement
lhd,off(b)
t <-- Sign-extended halfword
	from memory address b+off
	off is 16-bit two's complement
lhud,off(b)
t <-- Zero-extended halfword
	from memory address b+off
	off is 16-bit two's complement
luid,const
upper two bytes of $t <-- two byte const
lower two bytes of $t <-- 0x0000
lwd,off(b)
d <-- Word from memory address b+off
	off is 16-bit two's complement.
mfhid
d <-- hi ;  Move From Hi
mflod
d <-- lo ;  Move From Lo
mults,t
hi / lo < -- s * t ;  two's comp operands
multus,t
hi / lo < -- s * t ;  unsigned operands
nord,s,$0
d <-- bitwise NOT of s
nord,s,t
d <-- bitwise NOR of s with t
ord,s,$0
d <-- s
ord,s,t
d <--bitwise OR of s with t
orid,$0,const
d <-- zero-extended const
orid,s,const
d <-- s OR zero-extended const
sbd,off(b)
byte at off+b <-- low-order byte
	from register $d.
	off is 16-bit two's complement
shd,off(b)
two bytes at off+b <-- two low-order bytes
	from register $d.
	off is 16-bit two's complement
sll$0,$0,0
no operation
slld,s,shft
d <-- logical left shift of s by shft positions
	where  0 <= shft < 32
sltd,s,t
if s < t
	d <-- 1
else
	d <-- 0

two's comp. operands
sltid,s,imm
if s < imm
	d <-- 1
else
	d <-- 0

two's comp. operands
sltiud,s,imm
if s < imm
	d <-- 1
else
	d <-- 0

unsigned operands
sltud,s,t
if s < t
	d <-- 1
else
	d <-- 0

unsigned operands
srad,s,shft
d <-- arithmetic right shift of s by shft positions
	where 0 <= shft < 32
srld,s,shft
d <-- logical right shift of s by shft positions
	where 0 <= shft < 32
subd,s,t
d <-- s - t; with overflow trap
subud,s,t
d <-- s - t; no overflow trap
swd,off(b)
Word at memory address (b+off) <-- $t
	b is a register. off is 16-bit twos complement.
xord,s,t
d <-- bitwise exclusive or of s with t
xorid,s,const
d <-- bitwise exclusive or of s with const

Appendix D — Binary Addition Calculator (Applet)​

The binary addition algorithm operates on two bit patterns and results in a bit pattern. Usually all three patterns are the same size, and all three represent unsigned integers or all three represent signed integers.

Addition of one-bit binary operands is easy:

       0    0    1    1
      +0   +1   +0   +1
     ---  ---  ---  ---
      00   01   01   10

These sums show one-bit operands and two-bit results. For multi-bit operands, the above sums are used for each column. The left-most bit of the one-bit result is used for the carry into the next column. For example, here is the sum of two four-bit integers:

     0 1 1 0      <--  the carry into each column
       0 1 1 0    <--  first operand
       0 1 1 1    <--  second operand
       -------
       1 1 0 1    <--  the result

Adding the bits in one column produces a carry bit that is placed at the top of the next column to the left. This is called the carry out for this column and the carry in for next column left. Every column but the right-most includes a carry bit that comes from the column to its right. (Think of the right-most column as having a carry-in of zero.) Now columns have three bits to be added, and the addition rules must be extended:

       0    0    0    0    1    1    1    1
       0    0    1    1    0    0    1    1
      +0   +1   +0   +1   +0   +1   +0   +1
     ---  ---  ---  ---  ---  ---  ---  ---
      00   01   01   10   01   10   10   11

Of course, you don't have to memorize these rules. Just count the number of 1's in each column and write that count in binary.

Computers (usually) add two N-bit integers together to produce an N-bit result and a carry-out of the left-most column. Every bit of the result must have a value. The following shows an 8-bit addition:

        0 0 0 0 1 1 0 0
          0 0 0 0 1 1 1 0
          0 0 0 0 0 1 0 1
          ---------------
          0 0 0 1 0 0 1 1

The result is an N-bit pattern and a carry bit. The carry out from the left-most column might be zero or one. Each input pattern can be any pattern at all, and the algorithm will always produce an output pattern. However if the inputs are regarded as positive integers, some output patterns don't correspond to a correct sum. This is called overflow. Computer hardware looks at the carry into and out of the left-most column to determine if overflow happened.

Here is an implementation of this algorithm for 8-bit operands. Click on the bits of the operands X and Y to toggle the bits from 0 to 1 and back.

Appendix E — ASCII Chart​

This chart shows the bit patterns that encode various characters using the ASCII encoding scheme. Each character is encoded as an 8-bit pattern. The chart shows the pattern using the hexadecimal name for the pattern. The column heading gives the 1's place digit of the hex and the row heading gives the 16's place digit of the hex. For example, find the character 'K' in the central (yellow) portion of the chart. The column heading is B and the row heading is 4 so the bit pattern is 0x4B, or 0100 1011.

The ASCII code for CR is 0x0D. The ASCII code for character 'A' is 0x41.

Control characters are abbreviated in capital letters. Some useful ones are:

  • BS (backspace)
  • HT (horizontal tab)
  • LF (line feed)
  • VT (vertical tab)
  • FF (formfeed)
  • CR (carriage return)
  • ESC (escape)
  • SP (space)

Actually, space is a printable character, not a control character. Various things of ASCII-interest are available at Jim Price's ASCII page.

Appendix F — SPIM Exception Handler Services​

ServiceCode in $v0ArgumentsReturned Value
print integer1$a0 == integer
print float2$f12 == float
print double3$f12 == double
print string4$a0 == address of string
read integer5$v0 <-- integer
read float6$f0 <-- float
read double7$f0 <-- double
read string8$a0 == buffer address; $a1 == buffer length
allocate memory9$a0 == number of bytes$v0 <-- address
exit10